Intel is pairing a new memory strategy with future processor design, and Lip-Bu Tan says the company is looking at a setup that places DRAM vertically above the processor while skipping the intermediate layer. Tan also said memory is becoming a key factor in future chips rather than an external add-on, especially for AI workloads.
The company has also brought in former SK hynix CEO Seok-Hee Lee to strengthen its advanced memory and packaging work. Intel is trying to push that direction from more than one angle while keeping its main focus on processor products. One of the architectures Intel is considering is core vertical DRAM above the processor. According to the company, this could shorten data paths and increase interface width, but Intel also admits the approach has clear drawbacks, including cooling problems and chip-yield challenges.
Intel has also described XBM in a patent, a technology that avoids the intermediate silicon layer used in traditional HBM. The company says that approach could reduce costs, which makes it especially interesting alongside its broader memory plans. At the same time, Intel does not plan to return to mass DRAM production. Instead, the company wants to focus on memory integration and packaging for future products, so that Xeon, Core and accelerators stand out more clearly against competitors.
Intel's memory ambitions are becoming more serious, but the company still seems unwilling to become a mass DRAM maker again. It has also brought in Seok-Hee Lee to help push that strategy forward, raising the question of whether integration and packaging alone will be enough.
Can Intel stand out in memory by focusing on integration and packaging instead of mass DRAM production?
