Intel Unveils Its First Processors with 3D Cache

Intel has revealed details about its upcoming Xeon 6+ server processors, codenamed Clearwater Forest. The headline innovation is the use of 3D chip packaging, which dramatically increases the amount of L3 cache—a critical factor for server performance. This technology is also slated to eventually trickle down to consumer PCs.

Breaking from the design of its predecessors, the Xeon 6+ processors use a modular architecture. Instead of a few large dies, the CPU is composed of 12 smaller chiplets, each holding 24 energy-efficient cores based on the new Darkmont architecture. Intel claims these cores deliver an instructions-per-clock (IPC) performance increase of around 17% compared to the previous generation.

However, the core architecture wasn't the only star of the show. The three base tiles that house the core chiplets are topped with an additional layer—a massive L3 cache array boasting 192 MB each. Using Foveros Direct 3D technology, this cache die is placed directly underneath the compute modules, ensuring high-speed data access. In total, each processor packs a whopping 576 MB of L3 cache and supports 12 channels of DDR5 memory.

This cache-boosting strategy will be familiar, mirroring solutions already proven in the desktop CPU market by AMD, but this is its first application in an Intel server part. This kind of design significantly accelerates the processing of large datasets, which is critical for data centers, cloud computing, and AI workloads.

The new Xeon 6+ processors will be compatible with the existing Birch Stream platform, simplifying adoption. Volume production of Clearwater Forest is expected to begin no earlier than the second half of 2026. This launch marks a significant milestone for Intel, showcasing the company's shift towards a more flexible and efficient server architecture—one that will later also find its way into the company's gaming CPUs.